1. Technical Field
This disclosure is related to integrated circuits, and more particularly, to circuits for shifting logic levels during transfers from one voltage domain to another voltage domain.
2. Description of the Related Art
Modern integrated circuits often times include multiple functional blocks that are in different clock domains and/or voltage domains from one another. Circuits in different clock domains do not share a common clock signal, and their respective clock signals may operate at different frequencies. Circuits in different voltage domains may receive power at different voltages from one another. Despite the differences in operating clock frequencies and received voltages, circuits in different clock domains and/or voltage domains may nevertheless be arranged for communications with one another. Accordingly, various types of circuits may be provided in order to transfer signals from one clock and/or voltage domain to another.
For transmission of signals between first and second clock domains operating at different frequencies, a synchronizer may be used. A synchronizer may be implemented using a chain of serially coupled master-slave flip-flops. Since the clock domains may be operating at different frequencies, there is no guaranteed relationship between received data signals and a clock signal in the receiving domain. If a data signal arrives such that setup and hold time requirements are not satisfied, it is possible that the first flip-flop may enter a metastable state. In a metastable state, a state element (such as that in a flip-flop) may be placed in an unstable equilibrium in which neither a logic 1 or a logic 0 is stored. Over the course of several clock cycles, the serially coupled chain of flip-flops used to implement the synchronizer may resolve the metastability, outputting a logic 1 or a logic 0 from the final flip-flop of the chain.
For transmission of signals between first and second voltage domains receiving power at different supply voltages, level shifter circuits may be used. A level shifter circuit may receive logic signals having a first voltage swing and output corresponding logic signals having a second voltage swing. In some level shifters, the first voltage swing may be greater than the second voltage swing. In other level shifters, the first voltage swing may be less than the second voltage swing.